Executive Summary : | India's Semiconductor Mission aims to promote indigenous intellectual properties and achieve the vision of "Million Chips, Billion Dreams!" High-performance computing (HPC) systems are becoming the backbone for petascale computation in the data-centric computing era. The Indian IT ecosystem is a major consumer of such computing demand, particularly in the AI and Graphics categories. Performance optimization is critical for building efficient HPC systems. The project focuses on breaking the memory wall, a significant performance bottleneck in HPC systems, by proposing and developing models for 3D stacked caches. Previous developments in 3D memory system design, such as AMD V-cache and Intel Sapphire, have shown trends towards 3D memory system design. However, existing literature and open-source simulation models do not accurately model 3D caches, limiting the design space exploration for performance optimization and newer technology innovation like near cache optimizations.
The project consists of two components: developing a performance prediction simulation model for 3D stacked caches and researching opportunities for near-cache computation to address data movement across caches for modern applications. The research community and processor IP developers can directly use the designs and models, contributing to the semiconductor mission. The project also aims to train research scholars and students about 3D-stacked and near cache computation structures using the simulator framework and visualization tools, helping them understand 3D-stacked cache architecture and build their skill set for next-generation processor IP development. |