Research

Engineering Sciences

Title :

Improving performance of power electronic circuits using GaN-HEMT devices

Area of research :

Engineering Sciences

Focus area :

Power Electronics

Principal Investigator :

Prof. Anand Sandeep, Indian Institute Of Technology Kanpur

Timeline Start Year :

2019

Timeline End Year :

2022

Contact info :

Details

Executive Summary :

Because of their superior performance compared to Silicon (Si) based MOSFETs, Gallium Nitride (GaN) based High Electron Mobility Transistors (HEMT) show tremendous prospects in facilitating compact power electronics in applications like renewable energy, electrical vehicles and consumer electronics by minimizing the size of passive components such as capacitors and inductors on account of the higher switching frequency. With the rapid advancement of wide bandgap power transistor technology, the latest GaN power transistors are now commercially available. The commercialization of GaN HEMTs has enabled comprehensive R&D effort in academia as well as industry to assess the impact of using GaN HEMTs for power electronic converters. Numerous converter topologies exist today that can exploit the improved device performance by directly substituting Si MOSFETs with GaN HEMTs operating at the same switching frequency, whereas some designs explore the ability of operating at a much higher switching frequency to achieve higher efficiency and power density. However, along with the benefits of GaN over Si, there are several challenges associated with using GaN HEMTs in power electronic converters. They include, but are not limited to, switching frequency optimization, dead band optimization, driver circuit design, designing PCB layout to minimize stray effects, selection between hard switching and soft switching, cooling system design, etc. Some of the challenges to be studies and addressed, as a part of this proposal are: In addition to the operation frequencies, values of parasitics etc, there is drastic difference in reverse condition properties of GaN HEMT and Si MOSFET. A higher loss is associated with GaN HEMTs during reverse conduction, which poses a problem for converter topologies which depend on freewheeling of a MOSFET's body diode during the dead time period in order to achieve zero-voltage switching (ZVS). Deadtime minimization is one of the possible solutions, which can be explored for this problem. Owing to the fact that GaN HEMTs have a low threshold voltage of about 1V, an unintended driver turn-on can occur due to coupling via the gate-drain capacitance (Miller turn on). The driver circuit must be designed such that unintended turn ons are not encountered as this will lead to additional losses. This project would focus on improving the performance of power electronic circuits, while analyzing and solving some of the aforementioned challenges related to GaN devices in power electronics. The focus applications would be dc-dc and dc-ac converters for renewable applications.

Co-PI:

Prof. Yogesh Singh Chauhan Indian Institute Of Technology Kanpur,Kanpur Iit, Po Kanpur,Uttar Pradesh,Kanpur Nagar-208016

Total Budget (INR):

49,58,439

Publications :

 
1

Organizations involved