Executive Summary : | Static Random Access Memory (SRAM) is a crucial memory technology used in microprocessors and microcontrollers. However, the increasing demand for larger and faster microprocessors has led to increased power consumption in CMOS-based SRAM. As more transistors are integrated on a chip, it consumes more power, making reducing power consumption essential for improving system efficiency, performance, and reliability. The IDRS-2021 report predicts that CMOS technology will reduce to a feature size below 5 nm, leading to more leakage current, higher power dissipation, high crosstalk, and higher electron migration. This results in DIBL, reduced gate oxide thickness, and excessive current flow due to the merging of source and drain. To address these challenges, researchers are exploring new technologies like Quantum-Dot Cellular Automata (QCA). QCA technology incorporates a shift from transistor designs to design digital circuits using quantum dots or metal islands. The QCA cell, comprised of four 18 nm × 18 nm quantum dots, houses two free electrons that can tunnel among the adjacent cells. Information flows from an empty cell to a cell with polarized state. Compared to CMOS, QCA offers low power consumption, operational speed, and high device density. CMOS-based SRAM requires more transistors, increasing circuit area and cost. By using QCA technology, high-performing SRAM can be designed with fewer area and cost requirements, eliminating the disadvantages of CMOS SRAM. This project aims to implement M x N SRAM structures using QCA with features such as minimum latency, ultra low power, higher performance, and low cost. |