Research

Engineering Sciences

Title :

Novel receiver topologies for CMOS based receivers for IoT (Internet of Things) applications

Area of research :

Engineering Sciences

Focus area :

Wireless Communications

Principal Investigator :

Prof. Jayanta Mukherjee, Indian Institute Of Technology Bombay, Maharashtra

Timeline Start Year :

2020

Timeline End Year :

2023

Contact info :

Details

Executive Summary :

IoT is becoming increasingly popular nowadays. At a simplistic level IoT networks can be thought of as advanced WiFi networks. It promises massive networks of interconnected devices. With the advent of various standards like the IEEE 802.11ah, 802.11af and 802.11ad for Internet of Things (IoT), the number of interconnected devices is projected to increase exponentially. Of those protocols mentioned above, the IEEE 802.11ah appears to be the most promising since it is designed for the sub 1 GHz frequency band, is designed to provide connectivity to hundreds or thousands of remote IoT sensors, operates in the unlicensed 900 MHz and offers connectivity even when line of sight does not exist thereby enabling highly connected home or office or factory networks. While data rates up to 347 Mbit/s have been achieved using this protocol, the challenge is to obtain data transfer rates of the order of Gbit/s. To maximize data rates, the present day focus on RF receiver front end architecture is towards that of Software Defined Radios (SDR). This entails providing high flexibility in the channel selection and high linearity of the RF front end. From the RF Frontend point of view, the main limitations at present is that of the presence of undesired signals or "blockers" and inflexibility in channel selection. Failure to mitigate these effects result in high levels of distortion in the received baseband signal which in turn can lead to loss of information or slowing of data transfer. Devices operating in these frequency bands have to be immune to these interferers and blockers arising from various other sources. Successful elimination of these blockers have become one of the major bottlenecks towards achieving high data rates. As is well known the key to elimination of blockers is by achieving high linearity of the device and proper filtering of unwanted signals. Various topologies like mixer first and N path filtering have become popular in recent years. Of these, N path filtering has become quite standard nowadays especially in Software Defined Radios (SDR). This method offers highly flexible channel selection and also provides high linearity. The disadvantages of this method include high power consumption, high insertion loss and LO leakage. In this proposal we would investigate novel received topologies for obtaining high linearity and eliminating blocking signals for IoT applications especially the IEEE 802.11ah standard which has a relatively high fractional bandwidth. Special focus will be laid on N path filtering topologies that can reduce the problems of low efficiency and high insertion loss. Successful implementation of high channel flexibility and highly selective distortion free reception will enable even higher data rates than that can be achieved using present day IoT technologies.

Co-PI:

Dr. SUBRAT KUMAR PANDA Central University Of Rajasthan,Nh 8, Bandar Sindri,Rajasthan,Ajmer-305817

Total Budget (INR):

64,75,392

Organizations involved