Computer Sciences and Information Technology
Title : | An Architecture for In-memory Computing |
Area of research : | Computer Sciences and Information Technology |
Focus area : | Computing Architecture, Memory Systems |
Principal Investigator : | Dr. Sukanta Das, Indian Institute Of Engineering Science And Technology, West Bengal |
Timeline Start Year : | 2024 |
Timeline End Year : | 2027 |
Contact info : | sukanta@it.iiests.ac.in |
Details
Executive Summary : | This project aims to develop an architecture for in-memory computing (IMC). The IMC refers to a paradigm where computation is performed in memory, instead of fetching data in the CPU for computation. In traditional computing architecture (von Neumann architecture), data are fetched from main memory to CPU for computation, which induces a bottleneck, named as von Neumann bottleneck, due to huge data movement between memory and CPU. This bottleneck greatly impacts the performance of computation, specifically for data-intensive applications such as healthcare applications, social media applications, etc. The IMC has been proposed as an alternative computing architecture that can address the von Neumann bottleneck. In this work, we propose to explore cellular automata (CAs) over Cayley tree to develop such an architecture. The cellular automata, proposed by von Neumann to overcome the limitations of his own architecture (von Neumann architecture), have been established as a natural model of computation that can perform universal computation. In CAs, data do not move to other places for computation, rather the individual elements (cells) of a cellular automaton (CA) do local computation to get the final result. So a CA allows a massive parallelism and is free from von Neumann bottleneck. In addition to that, a memory unit has recently been added in the cells of a CA to observe its effect in computation. Hence, one can see the CAs with added memory as the small computing elements of cells on top of a memory. This shows a resemblance of IMC with CAs. In this background, the project targets to utilize the inherent ability of CAs to develop models for IMC. The investigators of the project have long experiences of research in the domain of CAs. In a recent article, the PI of the project has introduced memory that can store any kind of data in the cells of a CA. This CA can be used to develop models for IMC. Presently IMC has been developed as a middleware and faces challenges in computing complex functions such as arithmetic operations with integer or floating point numbers. So, a lot of primitive operations are required to realize such complex functions, if even possible. Here the primary requirement is to perform minimal modifications to the baseline structure of the memory chip in order to facilitate desired functionalities. Hence, the CAs with added memory are having the capability to address the issue. In summary, the project targets to develop an architecture for in-memory computing by exploring cellular automata over Cayley trees that use added memory in their cells. The proposed architecture promises to address the limitations of the present architecture of IMC. The proposed design will be tested with standard data and finally it will be implemented in hardware. In addition to this, two PhD thesis, a good number of publications will come out from the project. |
Co-PI: | Dr. Biplab K Sikdar, Indian Institute Of Engineering Science And Technology, Howrah, West Bengal-711103 |
Total Budget (INR): | 32,09,197 |
Organizations involved