Research

Physical Sciences

Title :

Design and hardware implementation of regular and time delay chaotic circuits for chaos based computing

Area of research :

Physical Sciences

Focus area :

Chaotic Circuit Networks

Principal Investigator :

Dr. Kaluvarayan srinivasan, Nehru Memorial College, Puthanampatti, Tamil Nadu

Timeline Start Year :

2024

Timeline End Year :

2027

Contact info :

Details

Executive Summary :

This study focuses on designing simple memristor-based chaotic circuits and analyzing their dynamics using analytical, numerical, and experimental investigations. The advantages of nonautonomous circuits are their control over their dynamics by varying external forces, which is straightforward to implement and can be demonstrated using electronic circuits. The periodically induced circuits, including memristor circuits, can exhibit a rich variety of dynamical phenomena, including chaotic hysteresis over certain regions of the DC offset voltage about a chaotic attractor state. The designed memristor circuit can be extended to study different types of chaos synchronization in coupled circuits without time delay. The study applies its results to time-delay coupled circuits, analyzing synchronization in coupled time-delay circuits for chaos-based computation and proposing an alternate scheme to implement dynamic logic gates for dynamic general-purpose computational hardware implementation. The study explores how delay-coupled nonlinear circuits can be utilized to create dynamical logic gates, considering the effects of coupling delay on the systems. The control parameter (delay) can be varied to achieve any desired logic function for the controlled dynamical logic gate. The study will extend to the network of coupled circuits and compare results with all-to-all coupled models to gain a better understanding of complex networks.

Total Budget (INR):

18,94,200

Organizations involved