Research
Title : | Design and development of real-time semantic segmentation networks and the corresponding FPGA-ASIC based hardware accelerators for possible deployment in commercial prototype for autonomous driving |
Area of research : | Engineering Sciences |
Principal Investigator : | Dr. Rafi Ahamed Shaik, Indian Institute Of Technology (IIT) Guwahati, Assam |
Timeline Start Year : | 2023 |
Timeline End Year : | 2026 |
Contact info : | rafiahamed@iitg.ernet.in |
Equipments : | Embedded GPU Board FPGA Board Image Display Device Image Capture Device Laptop |
Details
Executive Summary : | The demand for self-driving features in smart cars has significantly increased in recent years. The first step in decision-making for driverless cars involves scene parsing of road images, which uses semantic segmentation. Deep neural networks have been developed for this purpose, but general-purpose compute processors are slow and energy inefficient. This project aims to design, develop, and implement deep networks and FPGA-ASIC-based hardware architectures and accelerators for semantic segmentation of road images. Hardware accelerators will provide a fast and energy-efficient solution, making this project a promising deployment solution. Additionally, suitable deep neural networks will be developed and trained before hardware-based implementations. |
Co-PI: | Prof. Manas Kamal Bhuyan, Indian Institute Of Technology (IIT) Guwahati, Assam-781039 |
Total Budget (INR): | 28,75,302 |
Organizations involved
Implementing Agency : | Indian Institute Of Technology (IIT) Guwahati, Assam Funding Agency :Anusandhan National Rsearch Foundation (ANRF)/Science and Engineering Research Board (SERB) | Source :Anusandhan National Research Foundation/Science and Engineering Research Board (SERB), DST 2023-24 | |